1. Field of the Invention
The present invention relates generally to electronic devices, such as memory devices. More particularly, the present invention relates to efficient and accurate formation and spacing of nanotubes on a substrate of an electronic device.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Microprocessor-controlled circuits are used in a wide variety of applications. Such applications include personal computers, control systems, telephone networks, and a host of other consumer products. A personal computer or control system includes various components, such as microprocessors, that handle different functions for the system. By combining these components, various consumer products and systems may be designed to meet specific needs. Microprocessors are essentially generic devices that perform specific functions under the control of software programs. These software programs are generally stored in one or more memory devices that are coupled to the microprocessor or other peripherals.
Electronic components such as microprocessors and memory devices often include numerous integrated circuits manufactured on a semiconductor substrate. The various structures or features of these integrated circuits may be fabricated on a substrate through a variety of manufacturing processes known in the art, including layering, doping, and patterning. Obviously, the size of each feature directly impacts the number of features that may be formed on a substrate of a given size. Accordingly, it is generally desirable to reduce the size of such features in order to increase the number of elements that may be formed in a given area of the substrate.
Recently, it has been found that various nanostructures, such as nanotubes or nanowires, may be grown on a substrate by providing, and then processing, a catalyst material positioned on the substrate. Such nanostructures are quite versatile and, depending on the catalyst material and processing technique used, may be electrically conducting, insulating, or semiconducting. These structures are also quite small; certain single-walled nanotubes are known to be as small as one nanometer in diameter, while multi-walled nanotubes may be tens of nanometers in diameter. Based on their versatility and small size, these nanostructures are believed to be relevant to satisfying the general desire to provide ever decreasing dimension sizes of integrated circuits. The small sizes of these nanostructures, however, present certain difficulties with respect to efficiently forming and positioning these nanostructures. Particularly, due to the size of the features and the need to align multiple features with one another to produce an operable device, these nanostructures should be precisely placed to ensure alignment of the various structures. One known method for positioning nanostructures such as nanotubes is to grow the structures and then individually position them at a desired location on a substrate. As will be appreciated, this technique is time-consuming, costly, and inefficient.
There is a need, therefore, for a technique for efficiently and precisely positioning nanostructures, such as nanotubes and nanowires, on a substrate. There is a further need for devices and systems that incorporate nanostructures that are accurately disposed in desired locations on a substrate.